Lithography remains the ultimate hardware bottleneck in manufacturing cutting-edge AI accelerators. While ASML introduced standard Low-NA extreme ultraviolet (EUV) systems in 2019, the Dutch monopoly is now locking the entire semiconductor triumvirate into its $400 million High-NA machines. Intel is already running test systems, Samsung is targeting high-volume production by 2028, and TSMC has aligned its mass-adoption roadmap for 2030, according to Bloomberg.
At roughly $400 million per scanner, these capital requirements establish an insurmountable barrier to entry for prospective competitors and effectively guarantee that unit economics for next-generation silicon will remain sky-high. The technological leap hinges on expanding photomasks—the quartz stencils projecting circuit blueprints onto silicon wafers—from the legacy six-inch format to a twelve-inch standard.
"the coordinated push could raise the throughput of High-NA machines by 40 percent and simplify the design process, according to ASML technology chief Marco Pieters, who called it a huge opportunity."
As ASML CTO Marco Pieters points out, adopting twelve-inch masks promises a 40 percent throughput boost while simplifying intricate circuit layouts. Under their shared roadmap, TSMC and ASML plan to build a dedicated twelve-inch test line by 2031, aiming for fab integration by 2033. This commitment represents a strategic capitulation by TSMC, which accounts for roughly 16 percent of ASML's revenue and had spent months pushing back against early adoption costs.
China's Workaround with DUV Infrastructure
As Western export controls choke off access to advanced EUV machinery, Huawei and domestic foundries are attempting to assemble a self-sufficient lithography pipeline from scratch. As reported by the Financial Times, Beijing's multi-billion-dollar push remains tethered to deep ultraviolet (DUV) multipatterning workarounds—a strategy that widens the technological and cost chasm against ASML's High-NA hardware with every successive AI chip cycle.